The LPC1768/66/65/64 are ARM Cortex-M3 based microcontrollers for embedded applications
The LPC1768/66/65/64 operate at CPU frequencies of up to 100 Mhz.
The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals.
512 kB of flash memory
Up to 64 kB of data memory
8-channel general purpose DMA controller
2 CAN channels
2 SSP controllers
3 I2C-bus interfaces
8-channel 12-bit ADC
motor control PWM
general purpose timers
6-output general purpose PWM
ultra-low power Real-Time Clock (RTC) with separate battery supply
up to 70 general purpose I/O pins
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software
70 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors
Watchdog Timer (WDT) resets the microcontroller within a reasonable amount of time if it enters an erroneous state
Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down
Single 3.3 V power supply (2.4 V to 3.6 V)
Four external interrupt inputs configurable as edge/level sensitive
Clock output function that can reflect the main oscillator clock, IRC clock, RTC clock, CPU clock, and the USB clock
The Wakeup Interrupt Controller (WIC) allows the CPU to automatically wake up from any priority interrupt that can occur while the clocks are stopped in deep sleep, Power-down, and Deep power-down modes
Power-On Reset (POR).
Crystal oscillator with an operating range of 1 MHz to 25 Mhz.
PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.
Available as 100-pin LQFP package (14 ́ 14 ́ 1.4 mm).